Rated at 30 MIPS at a frequency of 40 MHz, the Field Programmable System Level Integration Circuit (FPSLIC) combines an 8-bit microcontroller with over 50 kgates of FPGA or PLD programmable logic.

**Graduate students interested in taking this course for Winter 2024 should enroll in COMP_ENG 495: Real-Time Digital Systems Design and Verification with FPGAs to get graduate credit. Class ...

These programmable-logic devices combine CPLD flash configurability with an FPGA lookup-table architecture for lower-cost, logic-intensive designs. Applications traditionally supported by high-density ...

My long running series titled "How the FPGA Came To Be" (referenced below) chronicles the development of programmable logic starting with programmable diode matrices developed and marketed by Harris ...